ModelSim(SE,PE) – 编译Xilinx SimPrim库产生“错误:C:\ Xilinx \ vhdl \ src \ simprims \ simprim_VITAL.vhd(xxx):VITAL TISD时序通用必须是VITAL延迟类型的标量形式。(1076.4节) 4.3.2.1.3.13)-Altera-Intel社区-FPGA CPLD-ChipDebug