LogiCORE SPI-4.2(POS-PHY L4)v6.1  –  BitGen“错误:DesignRules:10  –  Netcheck:信号”pl4_snk_top1 / pl4_snk_io0 / DynamicAlign.pbd / ….“完全没有布线。”-Altera-Intel社区-FPGA CPLD-ChipDebug