xilinx fir IP核 7.2版 多通道指标信号没有了

xilinx fir IP核 5.0版可以使用多通道指标信号chan_out
component fir_decim2
port
(
sclr: in std_logic;
clk: in std_logic;
ce: in std_logic;
nd: in std_logic;
rfd: out std_logic;
rdy: out std_logic;
data_valid: out std_logic;
chan_in: out std_logic_vector(1 downto 0);
chan_out: out std_logic_vector(1 downto 0);
din_1: in std_logic_vector(15 downto 0);
din_2: in std_logic_vector(15 downto 0);
dout_1: out std_logic_vector(31 downto 0);
dout_2: out std_logic_vector(31 downto 0)
);
end component;

但是7.2版没有了。
COMPONENT fir_interp2
PORT
(
aresetn : IN STD_LOGIC;
aclk : IN STD_LOGIC;
aclken : IN STD_LOGIC;
s_axis_data_tvalid : IN STD_LOGIC;
s_axis_data_tready : OUT STD_LOGIC;
s_axis_data_tdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0)
);
END COMPONENT;
请问多通道指标信号怎么获取呀？