Lattice March Xo2 CPLD 所能输出的最大电流和最大功率是多少？
我从Lattice March Xo2 CPLD的datasheet手册找到了这段话，但是怎么理解这段话呢？
4.For electromigration, the average DC current sourced or sinked by I/O pads between two consecutive VCCIO or GND pad connections, or between the last VCCIO or GND in an I/O bank and the end of an I/O bank, as shown in the Logic Signal Connections table (also shown as I/O grouping) shall not exceed a maximum of n * 8 mA. “n” is the number of I/O pads between the two consecutive bank VCCIO or GND connections or between the last VCCIO and GND in a bank and the end of a bank. IO Grouping can be found in the Data Sheet Pin Tables, which can also be generated from the Lattice Diamond software.
都是输出的时候才需要注意这个 输入是没有影响的 可以忽略不计
In the image below, on the 484 package there are ten I/Os bonded out on bank 5 between two GND pads (9 and 24) on the die. So there is a limit of 80 mA that can flow through these pins. If three of them are 24 mA drive LVTTL that leaves only 8 mA that the other 7 can sink/source. The trick is to intersperse inputs which have negligible current on the rest of that group.
就是电源和地之间的io电流最大就是nx8，假如你一个bank中总共有8个输出IO，那这8个输出IO的总电流是80mA,也就是说如果如果你在这个BANK中已有3个是24mA的电流输出的IO，那么你在这个BANK至多还能有一个输出IO，且该IO的电流最大输出值只能是8mA。