时序场景如下图所示,clk0和clk1两个时钟输入,经过BUFGMUX后,输出到后面的逻辑,但同时clk0和clk1还分别驱动了其他逻辑。
此时,如果路径A/B/C都不存在,其中A路径表示clk0与选择器输出的时钟之间的数据交互,B路径表示clk1与选择器输出的时钟之间的数据交互,C路径表示clk0和clk1之间的数据交互,那么使用下面的约束就可以了:
set_clock_groups -logically_exclusive -group clk0 -group clk1
如果路径 A、B 或 C 仅有一个存在,那么 clk0 和/或 clk1 与多路复用时钟直接交互。
则需要使用下面的约束:
create_generated_clock -name clk0mux -divide_by 1 \
-source [get_pins mux/I0] [get_pins mux/O]
create_generated_clock -name clk1mux -divide_by 1 \
-add -master_clock clk1 \
-source [get_pins mux/I1] [get_pins mux/O]
set_clock_groups -physically_exclusive -group clk0mux -group clk1mu
logically_exclusive
和physically_exclusive
的区别在于:
-
-logical_exclusive
logical_exclusive is used for two clocks that are defined on different source roots.
Logically exclusive clocks do not have any functional paths between them, but might have coupling interactions with each other.
An example of logically exclusive clocks is multiple clocks, which are selected by a MUX but can still interact through coupling upstream of the MUX cell.
When there are physically existing but logically false paths between the two clocks, use “set_clock_groups -logical_exclusive”. -
-physical_exclusive
physical_exclusive is used for two clocks that are defined on the same source root by “create_clock -add”.
Timing paths between these two clocks do not physically exist.
As a result you will need to use “set_clock_groups -physical_exclusive” to set them as false paths.简而言之,logical_exclusive用于选择器的电路,两个时钟的source不一样;而physical_exclusive两个时钟的source是一样,比如在同一个时钟输入口,但可能会输入两个不同的时钟。
再回到最上面的问题,如果路径A、B和C有一条存在,说明时钟之间有交互,就不能简单的使用logical_exclusive,而是要为这两个时钟都创建一个衍生时钟,但这两个衍生时钟属于physical_exclusive。
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