PotatoPieV4 litex vexriscv裸机biso启动和demo教程-LiteX社区-FPGA CPLD-ChipDebug

PotatoPieV4 litex vexriscv裸机biso启动和demo教程

平台构建

生成FPGA工程和编译BIOS, 但不编译FPGA。

python3 -m litex_boards.targets.icmaker_potato_pie_v4 --build --no-compile-gateware

  • Add --no-compile to disable the Softwate/Gateware compilation.
  • Add --no-compile-software to disable the Software compilation.
  • Add --no-compile-gateware to disable the Gateware compilation.

生成demo

litex_bare_metal_demo –build-path=build/icmaker_potato_pie_v4

–build-path要指向生成平台的目录, 参见https://github.com/enjoy-digital/litex/tree/master/litex/soc/software/demo

FPGA工程编译

从串口启动

从SD卡启动

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