![Altera器件的输入/输出缓冲器信息规范（IBIS）模型是否使用[Model Selector]关键字对输入/输出（I / O）可编程功能进行建模？-Altera-Intel社区-FPGA CPLD-ChipDebug](https://chipdebug.com/wp-content/uploads/2022/08/a681252a5f223945.png)
不可以。由于可以从所有支持的I / O功能中形成许多组合，因此更容易为每个I / O功能组合提供模型。例如，在Stratix TM器件中，您可以找到具有12mA驱动强度的3.3V LVTTL标准的“1s_ttl33_io_d12”，以及打开慢速摆率选项时的另一个“1s_ttl33_io_d12s”型号。
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