《数字设计和计算机体系结构》Digital Design and Computer Architecture.pdf-FPGA CPLD资料源码分享社区-FPGA CPLD-ChipDebug

《数字设计和计算机体系结构》Digital Design and Computer Architecture.pdf

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1.5.4 OR Gate
The OR gate shown in Figure 1.15 produces a TRUE output, Y, if either
A or B (or both) are TRUE. The Boolean equation for an OR gate is
written as Y A  B or Y A B. The symbol is pronounced
union and is preferred by logicians. Digital designers normally use the 
notation, Y A  B is pronounced “Y equals A or B”.
1.5.5 Other Two-Input Gates
Figure 1.16 shows other common two-input logic gates. XOR (exclusive
OR, pronounced “ex-OR”) is TRUE if A or B, but not both, are TRUE.
Any gate can be followed by a bubble to invert its operation. The
NAND gate performs NOT AND. Its output is TRUE unless both inputs
are TRUE. The NOR gate performs NOT OR. Its output is TRUE if
neither A nor B is TRUE.
Example 1.15 XNOR GATE
Figure 1.17 shows the symbol and Boolean equation for a two-input XNOR
gate that performs the inverse of an XOR. Complete the truth table.
Solution: Figure 1.18 shows the truth table. The XNOR output is TRUE if both
inputs are FALSE or both inputs are TRUE. The two-input XNOR gate is sometimes called an equality gate because its output is TRUE when the inputs are equal.
1.5.6 Multiple-Input Gates
Many Boolean functions of three or more inputs exist. The most common
are AND, OR, XOR, NAND, NOR, and XNOR. An N-input AND
gate produces a TRUE output when all N inputs are TRUE. An N-input
OR gate produces a TRUE output when at least one input is TRUE.
1.5 Logic Gates 21
OR
Y = A + B
ABY
000
011
101
111
A
B Y
Figure 1.15 OR gate
XOR NAND NOR
Y =A + B Y =AB Y=A+B
ABY
000
011
101
110
ABY
001
011
101
110
ABY
001
010
100
110
A
B Y A
B Y A
B Y
Figure 1.16 More two-input logic gates
A silly way to remember the
OR symbol is that it’s input
side is curved like Pacman’s
mouth, so the gate is hungry
and willing to eat any TRUE
inputs it can find!
Figure 1.17 XNOR gate

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