PLL主要是模拟电路。因此，PLL仿真模型不能以与硬件操作相同的方式运行。 。PLL仿真模型还侧重于将合理的仿真时间与实际硬件结果进行平衡。。例如，当输入时钟和参考时钟之间发现不匹配时，PLL模拟将立即失锁并且输出时钟将变为低电平。。在硬件中，PLL需要一些时间才能失锁并重新获得锁定。。同样在硬件中，PLL输出时钟不会变低。。输出时钟行为将取决于参考和反馈时钟发生的情况。
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