用于Arria V DUT的CPRI IP核v11.1 SP2测试平台.do文件需要修改-Altera-Intel社区-FPGA CPLD-ChipDebug

用于Arria V DUT的CPRI IP核v11.1 SP2测试平台.do文件需要修改

与针对Arria V器件的CPRI IP核v11.1 SP2变体的CPRI IP核v11.1测试平台一起提供的.do文件不能正确支持仿真。

解决/修复方法

要解决此问题,请在CPRI IP核Arria V testbench .do文件中执行以下步骤:

1.替换以下行:

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_reconfig_bundle_merger.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma_ch.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_rx_pma.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pma.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs_ch.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_native.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_plls.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_data_adapter.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv

使用以下替换行:

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_reconfig_bundle_merger.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_avmm_dcd.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_h.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_avmm_csr.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma_ch.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_rx_pma.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pma.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs_ch.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_avmm.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_native.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_plls.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_data_adapter.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_reconfig_bundle_to_basic.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_reconfig_bundle_to_xcvr.sv

vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv

2.注释掉以下行,以注释形式显示:

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_xcvr_avmm_dcd.sv cpri_top_level_sim/ #vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_xcvr_avmm_dcd.sv sv_xcvr_avmm_dcd.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv cpri_top_level_sim/ #vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv arriav_hssi_8g_pcs_aggregate_rbc.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_aux_rbc.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_rx_buf_rbc.sv cpri_top_level_sim/ #vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_rx_buf_rbc.sv arriav_hssi_pma_rx_buf_rbc.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_rx_deser_rbc.sv cpri_top_level_sim/ #vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_rx_deser_rbc.sv arriav_hssi_pma_rx_deser_rbc.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_buf_rbc.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_cgb_rbc.sv cpri_top_level_sim/ #vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_cgb_rbc.sv arriav_hssi_pma_tx_cgb_rbc.sv�

#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_ser_rbc.sv�

此问题已在CPRI MegaCore功能的12.0版中修复。

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